2.1 CPU registers
Located within the CPU. Not visible to high level programming languages, but accessible with assembly languages. Because of the speed of the circuits making up the registers, and their proximity, data transfers to/from the CPU registers is normally an order of magnitude faster than to/from external memory.
Registers are generally divided into two groups:
General purpose registers: Usable in assembly programs
Special purpose regsiters: Used exclusively by the CPU for the control of the execution of programs.
Data registers can be used to store temporal data or frequently-used data during a calculation, which will reduce the number of memory access, thereby speeding up the execution.
2.1.2 Address registers used as data registers
Using as data registers: When being used this way, only word and long word operations are available for use; no instructions operation on the individual bytes of an address register.
Using to address memory:
Memory map: main memory divided up into different regions for OS, user program code, data, IO etc.
DS define storage - label DS.size # - label, address of first storage, size, Byte, word or long, #, how many to reserve.
DC define constant
5.1 Condition code register (CCR) and condition flags
A special purpose 8-bit register containing five flag bits, which are set by the ALU immediately after an arithmetic or logic operation is performed to provide information about the result of the operation, but does not provide the result itself in most cases.
The values of these flags are used to form the conditions for branches.
Carry - C: Set to 1 if an addition operation produces a carry, otherwise set to 0
Overflow - V: Only useful for operations on signed integers. Set to 1 if the addition of two like-signed numbers produces a result that exceeds the 2's complement range of the operand; otherwise set to 0
Zero - Z: If the result is zero, set to 1, otherwise set to 0
Negate - N: Meaningful again only in signed number operations. Set to 1 if a negative result is produced, otherwise set to 0. The flag follows the MSB for an 8, 16 or 32-bit operand.
Extend - X: This bit functions as a carry for multiple precision operations.
5.2 Unconditional branch instructions
Program Counter PC: special purpose register, which stored the memory address of the instruction to be executes. After an instruction is fetched into the CPU for execution, the PC will be automatically updated to the address of the next instruction.
Without intervention, PC will be incremented by one instruction location at a time. Therefore instructions stored in consecutive memory locations will be executed in sequence.